Recently, not a few devices, such as a television and a mobile phone, have been provided with a liquid crystal display device. The liquid crystal display device is a display device including a liquid crystal display element which controls orientation of liquid crystal by controlling an electric field which is generated between electrodes, thereby controlling light transmittance of the liquid crystal display element. There are various methods of controlling the orientation of liquid crystal. The methods can be classified into a vertical electric field type and a lateral electric field type, from the viewpoint of a direction in which an electric field is generated.
A vertical electric field type liquid crystal display element includes (i) a pair of transparent substrates which are provided so as to face each other, and (ii) a liquid crystal layer which is sandwiched between the pair of transparent substrates. One of the pair of transparent substrates is provided with pixel electrodes. The other of the pair of transparent substrates is provided with a counter electrode. By applying a voltage across a pixel electrode and the counter electrode, an electric field perpendicular to the liquid crystal layer, in other words, a vertical electric field is generated in the liquid crystal layer. By controlling of an intensity and a direction of the vertical electric field, orientation of liquid crystal is restricted. Examples of a typical vertical electric field type liquid crystal display element include a TN (twisted nematic) mode liquid crystal display element and a VA (vertical alignment) mode liquid crystal display element.
FIGS. 5 and 6 schematically illustrate a liquid crystal display element 100 as an example of the vertical electric field type liquid crystal display element. (a) of FIG. 5 is a plan view illustrating the liquid crystal display element 100. (b) of FIG. 5 is a cross-sectional view taken along Line A-A illustrated in (a) of FIG. 5. (a) of FIG. 6 is an enlarged view illustrating part of the cross-sectional view illustrated in (b) of FIG. 5. (b) of FIG. 6 is an enlarged cross-sectional view taken along a scan line 120 which is parallel to the Line A-A illustrated in (a) of FIG. 5.
As illustrated in (b) of FIG. 5, the liquid crystal display element 100 includes (i) a pair of transparent substrates, i.e., a glass substrate 111 and a glass substrate 112, and (ii) a liquid crystal layer 113 which is sandwiched between the glass substrate 111 and the glass substrate 112. As illustrated in (a) of FIG. 5, the glass substrate 111 is provided with a plurality of signal lines 119, a plurality of scan lines 120, a plurality of TFTs (Thin Film Transistors), a plurality of pixel electrodes 130, and a plurality of common electrodes 140.
The plurality of signal lines 119 are arranged at regular intervals so as to be parallel to each other. Similarly, the plurality of scan lines 120 are arranged at regular intervals so as to be parallel to each other. The plurality of signal lines 119 are orthogonal to the plurality of scan lines 120. This causes rectangular regions, which are defined by the plurality of signal lines 119 and the plurality of scan lines 120, to be arranged in a matrix manner on a surface of the glass substrate 111. The rectangular regions correspond to respective sub-pixels. Three sub-pixels (a red sub-pixel, a green sub-pixel, and a blue sub-pixel) constitute one (1) pixel.
Two TFTs are provided for each sub-pixel. The two TFTs are a top gate coplanar TFT, and are provided with (i) gate electrodes 123, an SI electrically-conductive path 121, and an SI electrically-conductive path 122. The gate electrodes 123 of the TFT are part of a scan line 120 corresponding to the TFT. A source electrode (not illustrated) is provided at an end of the SI electrically-conductive path 121. The source electrode is connected to a signal line 119 via a contact hole (not illustrated). The SI electrically-conductive path 122 is connected to a drain electrode 124. The drain electrode 124 is connected to a pixel electrode 130 via a contact hole (not illustrated).
While one of the plurality of scan lines 120 is being selected, an address signal is supplied to the one of the plurality of scan lines 120, and the plurality of signal lines 119 sequentially receive a data signal. This causes a voltage to be supplied to the SI electrically-conductive path 122 and the pixel electrode 130 in accordance with the data signal. This consequently causes an electric field to be generated between the pixel electrode 130 and a counter electrode 125 in accordance with the data signal.
Even while none of the plurality of scan lines is being selected, the liquid crystal display element 100 should hold an electric field which is between the pixel electrode 130 and the counter electrode 125. The liquid crystal display element 100 includes the plurality of common electrodes 140 so that storage capacitance for holding the electric filed is generated. The plurality of common electrodes 140 are provided in a layer in which the plurality of scan lines 120 are provided. The plurality of common electrodes 140 are made of an opaque electrically-conductive metallic material which is identical to that of which the plurality of scan lines 120 are made. The plurality of common electrodes 140 are arranged in parallel to the plurality of scan lines 120. Each of the plurality of common electrodes 140 is provided between corresponding two adjacent scan lines 120 of the plurality of scan lines 120.
Similar to a vertical electric field type liquid crystal display element, a lateral electric field type liquid crystal display element includes a liquid crystal layer which is sandwiched between a pair of transparent substrates. However, the lateral electric field type liquid crystal display element is different from the vertical electric field type liquid crystal display element in that one of a pair of transparent substrates is provided with pixel electrodes and a common electrode. According to the lateral electric field type liquid crystal display element, an electric field is generated in an in-plane direction of the liquid crystal layer, in other words, a lateral electric field is generated, by applying a voltage across the pixel electrodes and the common electrode. Examples of the lateral electric field type liquid crystal display element include an IPS (in-plane switching) mode liquid crystal display element and an FFS (fringe field switching) mode liquid crystal display element.
Patent Literature 1 describes an FFS mode liquid crystal display element in which an influence of parasitic capacitance is reduced. A characteristic of this invention will be described below with reference to FIGS. 7 and 8.
FIG. 7 is a view schematically illustrating an FFS mode liquid crystal display element 200. (a) of FIG. 7 is a plan view illustrating the FFS mode liquid crystal display element 200. (b) of FIG. 7 is a cross-sectional view taken along Line A-A illustrated in (a) of FIG. 7. FIG. 8 is an enlarged view illustrating part of the cross-sectional view illustrated in (b) of FIG. 7.
As illustrated in (b) of FIG. 7, the FFS mode liquid crystal display element 200 includes (i) a pair of transparent substrates, i.e., a glass substrate 211 and a glass substrate 212, and (ii) a liquid crystal layer 213 which is sandwiched between the glass substrate 211 and the glass substrate 212. As illustrated in (a) of FIG. 7, the glass substrate 211 is provided with a plurality of signal lines 219, a plurality of scan lines 220, a plurality of TFTs, a plurality of pixel electrodes 230, and a common electrode 240. The common electrode 240 is made of an electrically-conductive material which is transparent to visible light.
The plurality of signal lines 219 are arranged at regular intervals so as to be parallel to each other. Similarly, the plurality of scan lines 220 are arranged at regular intervals so as to be parallel to each other. The plurality of signal lines 219 are orthogonal to the plurality of scan lines 220, whereby rectangular regions, which are defined by the plurality of signal lines 219 and the plurality of scan lines 220, are arranged in a matrix manner on a surface of the glass substrate 211. The rectangular regions correspond to respective sub-pixels. Three sub-pixels (a red sub-pixel, a green sub-pixel, and a blue sub-pixel) constitute one (1) pixel.
Two TFTs are provided for each sub-pixel. The two TFTs are a top gate coplanar TFT, and are provided with gate electrodes 223, an SI electrically-conductive path 221, and an SI electrically-conductive path 222. The gate electrodes 223 of the TFT are part of a scan line 220 corresponding to the TFT. The SI electrically-conductive path 221 is connected to a source electrode and a signal line 219 via a contact hole (not illustrated). The SI electrically-conductive path 222 is connected to a drain electrode 224. The drain electrode 224 is connected to a pixel electrode 230 via a contact hole (not illustrated). The pixel electrode 230 has slits so that an electric field is generated between the pixel electrode 230 and the common electrode 240 (later described).